» » » The Good, the Bad and the Ugly (Presented @FPGA-forum 2014)

The Good, the Bad and the Ugly (Presented @FPGA-forum 2014)

posted in: Presentations | 0

The way you implement your FPGA design and write your code has a huge impact on your development efficiency and product quality. The strange thing is that even many experienced designers tend to write both bad and ugly code. Does it matter if the code is ugly if it works in the lab? Yes – definitely, and for several reasons. First of all – the probability that ugly code has serious bugs is far higher than for good code. Also any change made to ugly code has a far higher risk of introducing bugs. And of course – ugly code makes it far more difficult to do a proper review. More time consuming, often frustrating, and with a far worse review quality. Bad and ugly code often results in errors that may be difficult to find and terrible to correct. This presentation will show some examples of bad and ugly code, how they result in inefficiency or bugs, and also suggest some remedies and suggestions for improvements – in order to write good code. (Examples will be in VHDL, but apply equally well for other languages)