
System on Chip Development
Being specialists both in the FPGA- and embedded software disciplines make us the ideal partner for system on chip applications. We have the skills to help you find the right tradeoff between dedicated hardware and software implementations. This enable us to achieve desired real-time properties.
Xilinx Zynq 7000
The Zynq®-7000 All Programmable SoC (AP SoC) family integrates the software programmability of an ARM®-based processor with the hardware programmability of an FPGA, enabling key analytics and hardware acceleration while integrating CPU, DSP, ASSP, and mixed signal functionality on a single device.
Microblaze or LEON3 soft-Cores
Dual ARM Cortex-A9
Embedded Linux
Realtime

intel Cyclone V
Cyclone® V SoCs provide low system cost and power. The SoC FPGA high-performance levels are ideal for differentiating high-volume applications, such as industrial motor control drives, protocol bridging, video converter and capture cards, and handheld devices. SoC FPGAs come in a wide range of programmable logic densities with many system-level functions hardened in silicon — a dual-core ARM* Cortex*-A9 Hard Processor System (HPS), embedded peripherals, multiport memory controllers, serial transceivers, and PCI Express* (PCIe*) ports.
Nios II or LEON3 soft-Core
Dual ARM Cortex-A9
Embedded Linux
Realtime

Hardware vs. software load balancing
Because SoCs integrate many hard IP blocks, you can lower your overall system cost, power, and design time. SoCs are more than the sum or their parts. How the processor and FPGA systems work together matters greatly to your system’s performance, reliability, and flexibility.





UVVM
UVVM is a VHDL testbench Infrastructure, Architecture, Library and Methodology for making better VHDL tesbenches.
Register Wizard
Bitvis provides a tool to accelerate and optimize the design flow for handling register interfaces between software and hardware.
Bitvis Methodology
Our methodology in FPGA design and verification has evolved for more than a decade.We can help with



Most customers would like the ability to do field upgrade and most chip vendors support such functions through specific IP. The IP must however in most cases be encapsulated with customised software to fit into our clients applications which is exactly what we do for most projects.
Preloader and U-boot is standard ways to load Linux. There is initially no difference in the preloader and U-boot procedure between a stand alone CPU and a SoC. Preloader can be started from USB interface, from a memory card or from the network. We have however for some applications twisted this al little and started the preloader from the FPGA. Then laounching U-Boot to install Linux and finally in the standard boot mode controlling boot sequence from the FPGA.
U-boot can be launched from various medias like SD-card , Ethernet, Flash and more once the interface has been set up properly.
Many features can be solved eiter in a CPU or through dedicated hardware. A top down approach, from system level to down, will in most cases appear to provide the best overview while maintaining flexibility in the project. Breaking each task down to sub-tasks will help reveal what kind of hardware resources are required to solve the task. To the extent that you are able to factorize the tasks, you will be able to reuse function blocks for multiple tasks.
It´s part of our culture to continuously develop tool which will help to speed up and streamline the entire development process. Register Wizard is such a tool which through a single source JSON file will generate the entire register interface including header files, documentation, VHDL files for the entire processor interface, and a VHDL based testbench for the FPGA.
In orded to increase the Realtime characteristics, it might be more efficient to set up two different operating systems on 1+1 processor cores rather than running the same OS on multiple cores. FreeRTOS is a great realtime OS when set up to handle only the realtime tasks. Embedded Linux can then be set up to handle all HMI and advanced communication on the other core.