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Jonathan E. Bjerkedok

Senior FPGA Developer – Design and Verification FPGA, VHDL

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Recent Posts

Advanced VHDL Verification – Made simple, * Live Online, 5-7 May 2020 (EMEA/APAC time zones)
Advanced VHDL Verification – Made simple. – – – Course On Request
Advanced VHDL Verification – Made simple, Berlin Germany 5-7 May 2020 (Moved to Live Online)
Advanced VHDL Verification – Made simple, Munich Germany 24-26. November. 2020
Advanced VHDL Verification – Made simple (Oslo, Norway) 20-22 Nov. 2019

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Accelerating FPGA Design Accelerating VHDL Verification

All courses may be held on-site (as is or adapted) on request or as an open course every time sufficient demand has accumulated

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Bitvis provide customized design services for the electronics industry. We guarantee efficient project development with high quality and low risk through proven methodology, structured development and our own tools and verification libraries.

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