Advanced VHDL Verification – Made simple. Date: 23-27 September 2020 (5 days) Time of day: 08:30-12:30 CEST Language: English Place: Live Online (see below) Registration fee: EUR 1850 +VAT Course responsible: Espen Tallaksen, Bitvis (Mobile: +47 934 21 … Read More
Date: 16-19 November, 2020 (4 days) Time of day: 9:00-12:00 Language: English Place: Live Online Registration fee: EUR 1250 +VAT, Course responsible: Espen Tallaksen, Bitvis (Mobile: +47 934 21 277) Registration: f you received an invitation to … Read More
Public or On-site course on request Advanced VHDL Verification – Made simple. Date: TBD Time of day: 9:00-16:30/17:00 (TBD) Language: English Place: Public or On-site Course fee: To be agreed Course responsible: Espen Tallaksen, Bitvis AS (Mobile: +47 934 … Read More
Advanced VHDL Verification – Made simple. Date: 5-7 May 2020 (3 days) Time of day: 9:00-17:00 CEST Language: English Place: Live Online (see below) Registration fee: EUR 1850 +VAT Course responsible: Espen Tallaksen, Bitvis AS (Mobile: +47 934 21 … Read More
Advanced VHDL Verification – Made simple. NOTE: This course is now changed to a Live Online course due to the current pandemic: Date: 5-7 May 2020 (3 days) Time of day: 9:00-16:30/17:00 (TBD) Language: English Place: Berlin, Germany Registration … Read More
Advanced VHDL Verification – Made simple. Date: November 24-26, 2020 (3 days) Time of day: 9:00-16:30/17:00 (TBD) Language: English Place: Munich, Germany Registration fee: EUR 1850 +VAT Course responsible: Espen Tallaksen, Bitvis AS (Mobile: +47 934 21 277) Registration: … Read More
Advanced VHDL Verification – Made simple. A general introduction to modern verification methodology and to UVVM – as the fastest growing FPGA and ASIC verification methodology in Europe. (26% of all FPGA designers in Europe pr. May 2018 – and … Read More
Advanced VHDL Verification – Made simple. Date: November 12-14, 2019 (3 days) Time of day: 9:00-16:30/17:00 (TBD) Language: English Place: Stuttgart, Germany Registration fee: EUR 1850 +VAT Course responsible: Espen Tallaksen, Bitvis AS (Mobile: +47 934 21 277) Registration: … Read More
Advanced VHDL Verification – Made simple. Date: June 18-20, 2019 (3 days) Time of day: 9:00-16:30/17:00 (TBD) Language: English Place: Copenhagen, Denmark(at Circle Consult in Nærum, Rundforbivej 271A) Registration fee: EUR 1850 +VAT(for multiple participants from the same company: … Read More
Advanced VHDL Verification – Made simple. Date: November 13-15, 2018 (3 days) Time of day: 9:00-16:30/17:00 Language: English Place: Scandic Hotel Asker Asker (just outside Oslo), Norway Registration fee: NOK 19.000 (for multiple participants from the same company: 2nd: NOK 18.000, … Read More