Advanced VHDL Verification – Made simple (Stockholm, Sweden) 2. Oct. 2018
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Advanced VHDL Verification – Made simple (Stockholm, Sweden) 2. Oct. 2018

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Advanced VHDL Verification – Made simple.

Date: October 2-4, 2018  (3 days)
Time of day:  9:00-16:30/17:00
Language: English
Place: Stockhom, Sweden
Registration fee: SEK 19.000 (for multiple participants from the same company: 2nd: SEK 18.000, 3rd: SEK 17.000, 4th: SEK 16.000, 5th: SEK 15.000)
Course responsible: Espen Tallaksen, Bitvis AS     (Mobile: +47 934 21 277)
Registration: To our course partners if you received the information from them.
Otherwise to info@bitvis.no
Please provide the following info:
– Company info including invoice info
– Names of participants
– E-mail address and Phone numbers to participants
– Info about if you have any special dietary requirements
Deadline for registration: August 30.
NOTE: Seating is limited, and priority will be given based on time of registration.

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A description of the course can be found *** HERE ***

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