Advanced VHDL Verification – Made simple,  * Live Online, 5-7 May 2020  (EMEA/APAC time zones)
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Advanced VHDL Verification – Made simple, * Live Online, 5-7 May 2020 (EMEA/APAC time zones)

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Advanced VHDL Verification – Made simple.

Date: 5-7 May 2020  (3 days)
Time of day:  9:00-17:00 CEST
Language: English
Place:   Live Online (see below)
Registration fee: EUR 1850 +VAT
Course responsible: Espen Tallaksen, Bitvis AS     (Mobile: +47 934 21 277)
Registration: If you received an invitation to this course from one of our course partners, please register via them (unless you have been told otherwise).
Otherwise please register to info@bitvis.no and give the following information: Name, Company name, Company Address, Email, Mobile, – and if required by your company a Purchase order reference.
Deadline for registration: TBD.
NOTE: “Seating” is limited, and priority will be given based on time of registration.

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A description of the course can be found *** HERE ***

Note: This course will be held live online.