– Including UVVM Utility Library and VVC Framework
Efficiency and quality is all a question of overview, readability, maintainability and re-use, – and UVVM is the answer. A description of the course and related info can be found *HERE*
Please note that the previous course ‘FPGA Development Best Practices’ is now split into two different courses:
- Accelerating FPGA Design (Digital Design; language, tool and technology independent )
- Accelerating FPGA VHDL Verification (Structured verification with examples from UVVM)
These issues are the main subjects of this course:
(See one course example here: /events/accel-fpga-verifi,-berlin-2016/)
- Making a simple VHDL test bench step-by-step
- Using procedures and making good BFMs
- Applying logs, alerts, value and stability checkers, awaits, etc…
- Making an advanced VHDL test bench step-by-step
- Assertions, randomisation, constrained random, coverage, debuggers, monitors
- Verification components and testbench architecture for advanced Verification
- Making testbenches as simple as possible – adapting to the DUT complexity
- Structuring, Debugging, Overview, Maintainability, Extendibility
- Examples and labs using UVVM
Date: April 20-21, 2016
Time of day: Wednesday 9:00-17:00, Thursday 9:00-16:00
Place: Stockholm, Sveavägen 64 (Realtime Embedded’s office)
Registration fee: SEK 10.900 (+VAT)
for multiple participants from the same company:
2nd: SEK 10.000, 3rd: SEK 9.000, 4th: SEK 8.000, 5th: SEK 7.000)
- Lunch and coffee: Included in the registration fee
- Course responsible: Espen Tallaksen, Bitvis AS (Mobile: +47 934 21 277)
- Registration: By email to Espen.Tallaksen@bitvis.no or to Realtime Embedded AB
- The course will be held in cooperation with Realtime Embedded (Stockholm) (for adminstrative issues in Sweden).
- Espen Tallaksen, managing director and founder of Bitvis AS
- 30 years of experience within VHDL design and verification
- During twenty years Espen has had a special interest for methodology cultivation and pragmatic efficiency and quality improvement. One result of this interest is the UVVM verification platform that is currently being used by companies world-wide.
- He has given many presentations in Scandinavia on various technical aspects of FPGA development — including: – Keynote at FPGAworld – Keynote speaker at ABB Embedded Systems Forum – Various presentations at FPGAworld…and many more
- Initiator and chair of the Norwegian FPGA-forum committee
About Bitvis AS
The extended history…
- Bitvis was established in 2012 to provide state of the art design services within FPGA development and embedded Software development
- The story goes all the way back to Digits founded in 2003 which was later acquired and where as a splinter group with the inherited spirit of Digitas AS founded Bitvis AS.
- Espen Tallaksen has ever since the foundation of Digitas in 2003 held courses and seminars as open class, for companies or as lectures for local universities – all in the aim to make VHDL development more efficient and with higher quality.
- Courses have so far been held in Norway, Sweden, Denmark, Germany and UK.