3x UVVM at FPGA-Kongress in Munich 14-16 July 2016
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3x UVVM at FPGA-Kongress in Munich 14-16 July 2016

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fpga_ohnejahr_webseiteis one of the largest FPGA conferences in the world.
We are really proud that two presentations and a tutorial have been accepted, and this only 5 months after releasing UVVM VVC Framework  🙂

Bitvis will have two presentations and a hands-on tutorial at FPGA-Congress in Munich in Germany July 12-14, 2016.

  • July 12: ‘Improve your VHDL Testbench – a practical Approach’ (30 min)
  • July 13: Hands-on Tutorial: ‘Advanced VHDL Verification – As simple and structured as possible. – And here you can try it…’ (90 min)
  • July 14: ‘A game changer for VHDL verification: Advanced VHDL Verification – Made simple – For anyone’ (45 min)

See program and abstracts here