FEATURED PROJECTS
Advanced VHDL Verification – Made simple (Oslo, Norway) 13. Nov. 2018
Advanced VHDL Verification – Made simple. Date: November 13-15, 2018 (3 days) Time of day: 9:00-16:30/17:00 Language: English Place: Scandic Hotel Asker Asker (just outside Oslo), Norway Registration fee: NOK 19.000 (for multiple participants... Read More
Advanced VHDL Verification – Made simple (Ankara, Turkey) TBD. Nov. 2018
Advanced VHDL Verification – Made simple. Date: November TBD, 2018 (3 days) Time of day: 9:00-16:30/17:00 Language: English Place: Ankara, Turkey Registration fee: TBD Course responsible: Espen Tallaksen, Bitvis AS (Mobile: +47... Read More
Advanced VHDL Verification – Made simple (Stockholm, Sweden) 2. Oct. 2018
Advanced VHDL Verification – Made simple. Date: October 2-4, 2018 (3 days) Time of day: 9:00-16:30/17:00 Language: English Place: Stockhom, Sweden Registration fee: SEK 19.000 (for multiple participants from the same company: 2nd: SEK... Read More
Advanced VHDL Verification – Made simple (Munich, Germany) 19. June. 2018
Advanced VHDL Verification – Made simple. Date: June 19-21, 2018 (3 days) Time of day: 9:00-16:30/17:00 Language: English Place: Munich, Germany Registration fee: EUR 1850 +VAT Please see TRIAS course site Course... Read More
Hands-on workshop for Intel Cyclone 10 LP FPGA: 2017 – October 17. Oslo, 18. Trondheim, 19. Stavanger
Intel Cyclone 10 LP FPGAs are designed for low static power, low cost applications, such as I/O expansion, sensor fusion, motor/motion control, chip-to-chip bridging and IoT applications. Read more here Read More