4x UVVM at FPGA-Kongress in Munich in July
Bitvis FPGA courses to Argentina
SPI VVC - A New free VHDL Verification Component for UVVM
Presenting UVVM in UK and Germany (NMI & DVCon-Europe)
Great feedback from our 2-day course 'Accelerating FPGA VHDL Verification'
FPGA development Courses (various)
UVVM VVC Framework is Freeware that will boost verification of modules and FPGAs with multiple simultaneously active interfaces.
More information on UVVM and download here.
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