4x UVVM at FPGA-Kongress in Munich in July
Bitvis FPGA courses to Argentina
SPI VVC - A New free VHDL Verification Component for UVVM
Presenting UVVM in UK and Germany (NMI & DVCon-Europe)
Great feedback from our 2-day course 'Accelerating FPGA VHDL Verification'
FPGA development Courses (various)
Bitvis has just employed another two FPGA-designers.They both start after the summer holiday.
Bitvis will then be 12 developers, - a 100% increase in 1,5 years :-)
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