News

4x UVVM at FPGA-Kongress in Munich in July

There will be three presentations and two hands-on tutorial from Bitvis at FPGA-Congress in Munich …

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Bitvis FPGA courses to Argentina

BP To AcceleratingBilderesultat for buenos aires

Bitvis will arrange an on-site course in Buenos Aires in May - First on FPGA design and then …

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SPI VVC - A New free VHDL Verification Component for UVVM

An SPI VHDL verification component (VVC) is now available for free with UVVM - the Universal VHDL…

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Presenting UVVM in UK and Germany (NMI & DVCon-Europe)

There is a huge interest for UVVM (Universal VHDL Verification Methodology).

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Great feedback from our 2-day course 'Accelerating FPGA VHDL Verification'

Accelerating _FPGA_VHDL_Verification

 'Acclerating FPGA VHDL Verification' was our first pure FPGA Verification course, based on 'FP…

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3x UVVM at FPGA-Kongress in Munich in July

Bitvis will have two presentations and a hands-on tutorial at FPGA-Congress in Munich in Germany Ju…

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New free VHDL Verification Components for UVVM

I2C VIP (VVC) is now available for free with UVVM - the Universal VHDL Verification Methodology (…

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FPGA Development Best Practices - Course is split in two

BP To Accelerating

Our 2-3 day course 'FPGA Development Best Practices' is now split into separate courses on Desi…

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Bitvis ny medlemsbedrift i Norwegian Centre of Expertise Systems Engineering Kongsberg

NCE Systems Engineering ønsker Bitvis AS velkommen som ny medlemsbedrift. Bitvis er et designsente…

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UVVM - VHDL Verification Component Framework may now be downloaded

UVVM VVC Framework is Freeware that will boost verification of modules and FPGAs with multiple simu…

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Bitvis Utility Library is discontinued. Long live UVVM Utility Library

UVVM Utility Library is now replacing Bitvis Utility Library as follows:

  • BVUL (Bitvis Util…
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Electronics industry suffering from bad university priorities

Bitvis is presenting an Invited talk at in Oslo, Tuesday 27 October @16:30:

The e…

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New SW developer in Bitvis

Andreas Tornes joined Bitvis on October 1, 2015.

He will work as an embedded software developer …

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Bitvis Newsletter 2015 #2

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Presenting UVVM at FPGAworld 2015

Bitvis is again giving technical presentations at

------- 

Bitvis will giv…

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FPGAs - a 1000x performance increase. How? What? Why?: Video from NDC is available

FPGAs - a 1000x performance increase. How? What? Why?

An FPGA is …

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Free VHDL Verification seminar - A great success

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SystemVerilog & UVM/VMM expertise, - and the need for such

Bitvis has perhaps the best SystemVerilog experience available in Norway, with lots of knowledge al…

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Universities are embracing Bitvis verification methodology

The University of Oslo, Bergen University College and University of Bergen are now all using Bitvis…

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'FPGA Dev. Best Practices' gets excellent feedback

At our 'FPGA-development Best Practices course, arranged by Realtime Embedded in Stockholm Nov. 19-…

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FPGA-forum invitation

Logo FPGA Forum

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Dedicated Sales Director for Bitvis

William Braathen is employed as Sales Director in Bitvis.

Our search for a sales director wit…

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FPGA-forum: Programme almost complete

The programme for FPGA-forum 2015 is almost complete.

All presentations and workshops are now li…

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Bitvis is now member of EtherCat Technology Group

Bitvis is pleased to announce membership of the EtherCat Technology Group

The EtherCAT Techno…

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Cooperation with Realtime Embedded in Sweden

Realtime Embedded in Stockholm (Sweden) and Bitvis will be cooperating on selected important areas …

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Guest Lecture and Presentation in Bergen

Bitvis is giving a guest lecture at Bergen University College and University of Bergen (combine…

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Keynote++ at ABB's Embedded Systems Forum

Bitvis was invited to hold the Keynote and interesting technical presentations at ABB's Embedded Sy…

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UVVM: "UVM for VHDL"

Universal VHDL Verification Methodology (UVVM)

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3 presentations at FPGAworld

Bitvis will be holding 3 presentations at FPGAworld in Stockholm, Sept. 9 2014:

- A3: Achieving…

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Bitvis Utility Library v2.3.0 is now available

See

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Released PPTs on making good testbenches

Powerpoint-presentations have now been released as PPT/PPS for the following presentations:

- 'M…

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Ledig stilling: Salg, Kundeoppfølging og Markedsføring

Vi søker en dyktig person som kan ta ansvar for Salg, Kundeoppfølging og Markedsføring.

Se

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FPGA related courses from Bitvis

Bitvis offers a variety of courses on FPGA development - all with a focus on Best Practices and a p…

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Bitvis Utility Library gets international attention

Bitvis Utility Library, a free and open source verification library for FPGA development Is receivi…

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Bitvis Embedded Software Methodology

Two years ago a group of designers saw an opportunity not only to provide working force to the cust…

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Guest lectures to teach students good design practice

Bitvis is regularly presenting important topics within embedded systems to the students at Universi…

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FPGA-forum 2015: The date is set

FPGA-forum is a 2-day seminar and exhibition . At this yearly event a major number of senior desig…

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FPGA-forum 2014 summary and feedback

FPGA-forum is a 2-day seminar and exhibition . At this yearly event a major number of senior d…

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Bitvis Utility Library v2.2.1 is released

Minor fix for Active-HDL

See .

 

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Guest lectures at UiO and NTNU

Bitvis is giving two new two guest lectures on methodology

Feb. 24 2014: UiO (University of Oslo…

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FPGA-forum: Final programme available

The for FPGA-forum 2014 is now available.

 

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FPGA VHDL Workshop at FPGA-forum

Aldec and Bitvis cooperate to make a one day workshop on making good VHDL testbenches.

We will ru…

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Guest lectures in Bergen and Oslo

Bitvis is giving two times two guest lectures.

First at Bergen University College and Univerit…

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Better Projects and Products

See why our improvement investments result in

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New Experienced Software developer

Herman Wintermark is starting in Bitvis Oct. 1 2013.

He has 12 years experience with embedded sof…

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FPGA course August 21-22

Our two-day course 'FPGA Development Best Practices' will be arranged August 21-22 in Asker (Scandi…

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Bitvis Utility Library: VHDL'93 update

A VHDL'93 compatible version of Bitvis Utility Library has been released.

See .…

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Bitvis søker embedded SW utvikler (Norw.)

Vi søker etter flere utviklere til embedded SW.

Se mer under

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Two more FPGA-developers

Bitvis has just employed another two FPGA-designers.

Bi…

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'FPGA verification: A kick-start platform'

See article in  (in norwegian) pages 12 and 26 (Norw.)

More information unde…

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Partners for development of embedded systems

Bitvis now offers our customers complete development services within the full area of embedded syst…

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'FPGA development; – Full speed, but insufficient coordination ' (Elektronikk, Norw.)

(article in Elektronikk 7/8 2012)

Vår introduksjon til en kommende serie med artikler om effektiv…

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Bitvis gives invited presentation “FPGA development in Norwegian Industry” at FPL-2012 in Oslo

Bitvis was invited to give a presentation at FPL-2012 in Oslo on “FPGA development in Norwegian Ind…

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Free VHDL Verification seminar - is filling up

There are still seats available in our free VHDL Verification seminar, but we expect the course to …

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Bitvis Utility Library v2.6.0 is now available

Updated Bitvis Utility Library - with new functionality

See

The most import…

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FPGA-forum: Påmelding åpen

Det er nå mulig å melde seg på FPGA-forum 2016.

Vi har gjort første avklaring ift arrangementet o…

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