FPGAs: Establishing a 'Fit for Purpose' Design Flow

Published: 11. Sep 2013

Bitvis is contributing to a seminar in Stockholm on better FPGA design and verification - together with Aldec, SynthWorks and Achronix.

We will show you how to make a more compact, readable, understandable and modifiable testbench using the open source Bitvis Utility Library.
A few years ago a similar library had a license cost of 75.000 kroner (~6.500 euro). Now it's free  :-) 

See info and agenda for the seminar

See more info on Bitvis Utility Library.