Published: 10. Sep 2013

Bitvis will have two presentations on FPGAworld 2013 in Stockholm:


10:30 Industrial track:
Improve your VHDL testbench. - A practical approach

14:30 Product program:
Faster, Cheaper and Safer FPGA Development - A practical approach



Improve your VHDL testbench. - A practical approach

Most simple testbenches have close to no structure, are terrible to modify and hopeless to understand. They often take far too much time to implement, and provide close to no support when debugging potential problems.

Bitvis Utility Library is now available as open source (bitvis.no/downloads) - as a general solution to this problem. 

This presentation goes beyond the introductory webinar on our website, and presents the features, concept and usage of this Library, which allows a major improvement for most companies.


Faster, Cheaper and Safer FPGA Development - A practical approach

Have you ever experienced delays in FPGA projects?
Have you ever detected bugs too late in (or after) an FPGA project?
Have you or other team members ever spent more man-hours than scheduled in an FPGA project?

Many tool vendors try to convince you they have a solution for improving this, - and some of the tools do help - a bit....
However, - the ONLY way to SIGNIFICANTLY improve your FPGA development time, cost and risk - is to improve the way you and your team work when developing an FPGA - almost independent of expensive tools.

It is all a question of knowledge, awareness, methodology, internal development support, quality assurance and structure at all levels. It is also a question of how you apply this to your own work - and to the project.

There are lots of approaches to improving schedule and quality, but most of them have a wrong focus or do not work in a real project. A pragmatic and practical approach is required to get significant improvements. The good thing about this is that no expensive tool is required. It is only a matter of applying experience and common sense in a structured manner.

This presentation is meant as a teaser to our two day course 'FPGA development Best Practices'. The presentation summarizes the normal challenges of FPGA development, gives an overview of solutions, and tells you how this is covered in our course. The course has previously been held in Linköbing, Stockholm, Copenhagen and several places in Norway, as weel as on-site, for instance at TransMode Systems in Sweden.

The feedback from the participants has always been very good, and in Norway around 50% of all full time FPGA developers have attended the course.