Advanced VHDL Verification – Made simple.

Date: Nov 28-30, 2017  (3 days)
Time of day:  9:00-16:30/17:00
Language: English
Place:   TBD, Germany
(TRIAS will come up with location soon)
Registration fee: EUR 1850 +VAT

Please see TRIAS course site

Course responsible: Espen Tallaksen, Bitvis AS     (Mobile: +47 934 21 277)
Registration: Please see  TRIAS course site
Deadline for registration: TBD.
NOTE: Seating is limited, and priority will be given based on time of registration.


A description of the course can be found *** HERE ***